LPC2368FBD100

Product Summary

The LPC2368FBD100 is a Single-chip microcontroller based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with up to 512 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical performance in interrupt service routines and DSP algorithms, this increases performance up to 30 % over Thumb mode. For critical code size applications, the LPC2368FBD10 alternative 16-bit Thumb mode reduces code by more than 30 % with minimal performance penalty. Due to their tiny size and low power consumption, the LPC2368FBD100 is ideal for applications where miniaturization is a key requirement, such as access control and point-of-sale. Serial communications interfaces ranging from a USB 2.0 Full-speed device, multiple UARTs, SPI, SSP to I2C-bus and on-chip SRAM of 8 kB up to 40 kB, make these devices very well suited for communication gateways and protocol converters, soft modems, voice recognition and low end imaging, providing both large buffer size and high processing power.

Parametrics

LPC2368FBD100 absolute maximum ratings: (1)supply voltage (core and external rail): -0.5 V min and +3.6 V max; (2)analog 3.3 V pad supply voltage: -0.5 V min and +4.6 V max; (3)input voltage on pin VBAT: -0.5 V min and +4.6 V max; (4)input voltage on pin VREF: -0.5 V min and +4.6 V max; (5)input voltage: -0.5V min and +6.0V max; (6)supply current per supply pin: - 100 mA; (7)ground current per ground pin: - 100 mA; (8)torage temperature: -40 to +125 ℃.

Features

LPC2368FBD100 features: (1)ARM7TDMI-S processor, running at up to 72 MHz; (2)Up to 512 kB on-chip Flash Program Memory with In-System Programming (ISP) and In-Application Programming (IAP) capabilities. Flash program memory is on the ARM local bus for high performance CPU access; (3)8/32 kB of SRAM on the ARM local bus for high performance CPU access; (4)16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM; (5)8 kB SRAM for general purpose DMA use also accessible by the USB; (6)Dual AHB system that provides for simultaneous Ethernet DMA, USB DMA, and program execution from on-chip Flash with no contention between those functions. A bus bridge allows the Ethernet DMA to access the other AHB subsystem; (7)Advanced Vectored Interrupt Controller, supporting up to 32 vectored interrupts.

Diagrams