Product Summary

The STK12C68-P45 is a fast static RAM with a nonvolatile, electrically erasable PROM element incorporated in each static memory cell. The STK12C68-P45 can be read and written an unlimited number of times, while independent, nonvolatile data resides in EEPROM. Data transfers from the SRAM to the EEPROM (the STORE operation) can take place automatically on power down. A 68μF or larger capacitor tied from VCAP to ground guarantees the STORE operation, regardless of power-down slew rate or loss of power from hot swapping. Transfers from the EEPROM to the SRAM (the RECALL operation) take place automatically on restoration of power. Initiation of STORE and RECALL cycles can also be software controlled by entering specific read sequences. A hardware STORE may be initiated with the HSB pin.

Parametrics

STK12C68-P45 absolute maximum ratings: (1)Voltage on Input Relative to VSSc(2)Voltage on DQ0-7 or HSB:–0.5V to (VCC + 0.5V); (3)Temperature under Bias:–55 to 125℃; (4)Storage Temperature:–65 to 150℃; (5)Power Dissipation:1W; (6)DC Output Current (1 output at a time, 1s duration):15mA.

Features

STK12C68-P45 features: (1)20ns, 25ns, 35ns and 45ns Access Times; (2)STORE to EEPROM Initiated by Hardware, Software or AutoStore on Power Down; (3)RECALL to SRAM Initiated by Software or Power Restore; (4)10mA Typical ICC at 200ns Cycle Time; (5)Unlimited READ, WRITE and RECALL Cycles; (6)1,000,000 STORE Cycles to EEPROM; (7)100-Year Data Retention in EEPROM; (8)Single 5V + 10% Operation; (9)Not Sensitive to Power On/Off Ramp Rates; (10)No Data Loss from Undershoot; (11)Commercial and Industrial Temperatures; (12)28-Pin SOIC and DIP Packages.

Diagrams

STK12C68-P45 pin connection

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STK1050II

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Data Sheet

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STK10C68
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Data Sheet

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