(China (Mainland))
Product Summary
The GAL22V10D-10LJN is a High Performance E2CMOS PLD Generic Array Logic. The GAL22V10D-10LJN, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10D-10LJN to consume much less power when compared to bipolar 22V10 devices. E2 technology offers high speed (<100ms) erase times, providing the ability to reprogram or reconfigure the device quickly and efficiently.
Parametrics
GAL22V10D-10LJN absolute maximum ratings: (1)Supply voltage VCC: -0.5 to +7V; (2)Input voltage applied: -2.5 to VCC +1.0V; (3)Off-state output voltage applied: -2.5 to VCC +1.0V; (4)Storage Temperature: -65 to 150℃; (5)Ambient Temperature with Power Applied: -55 to 125℃.
Features
GAL22V10D-10LJN features: (1)high performance e2cmos technology, 4 ns Maximum Propagation Delay; Fmax = 250 MHz; 3.5 ns Maximum from Clock Input to Data Output; UltraMOS Advanced CMOS Technology; (2)ACTIVE PULL-UPS ON ALL PINS; (3)compatible with standard 22V10 DEVICES; (4)Fully Function/Fuse-Map/Parametric Compatible with Bipolar and UVCMOS 22V10 Devices; (5)50% to 75% reduction in power versus bipolar, 90mA Typical Icc on Low Power Device; 45mA Typical Icc on Quarter Power Device; (6)E2 CELL TECHNOLOGY, Reconfigurable Logic; Reprogrammable Cells; 100% Tested/100% Yields; High Speed Electrical Erasure (<100ms); 20 Year Data Retention; (7)Ten output logic macrocells, Maximum Flexibility for Complex Logic Designs; (8)preload and power-on reset of registers, 100% Functional Testability; (9)APPLICATIONS INCLUDE: DMA Control; State Machine Control; High Speed Graphics Processing; Standard Logic Speed Upgrade; (10)electronic signature for identification.
Diagrams
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 GAL22V10D-10LJN |
Lattice |
SPLD - Simple Programmable Logic Devices HI PERF E2CMOS PLD |
Data Sheet |
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GAL22V10D-10LJNI |
Lattice |
SPLD - Simple Programmable Logic Devices HI PERF E2CMOS PLD |
Data Sheet |
Negotiable |
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